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- Pickering Interfaces Inc.
product
3-Channel PXI Function Generator
41-620A-003
The 41-620A is a compact 3-channel function generator provided in a PXI 3U single-slot module and is fully backward compatible with our 41-620-003 module. It is capable of generating sine waves to 10MHz with 48-bit frequency resolution referenced to the 10MHz PXI clock or to an external standard. This module can generate arbitrary waveforms loaded into the internal 256k memory, allowing the function generator to emulate many waveform types, including the typical waveforms of automotive and aerospace sensors.
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Synthesized Clock Generator
CG635
Stanford Research Systems, Inc.
The CG635 generates extremely stable square wave clocks between 1 µHz and 2.05 GHz. The instrument''s high frequency resolution, low jitter, fast transition times, and flexible output levels make it ideal for use in the development and testing of virtually any digital component, system or network. Clocks from 1 µHz to 2.05 GHz. Random jitter <1 ps rms. 16 digits of frequency resolution. 80 ps rise and fall times. CMOS, PECL, ECL, LVDS & RS-485. Phase control and time modulation. PRBS for eye-pattern testing. OCXO and rubidium timebase.
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6-Ch 200 MHz A/D with DDC & 4-Ch 800 MHz D/A with DUC, Kintex UltraScale - 6UVPX
Model 58821
- Jade Xilinx Kintex UltraScale FPGA Products and Navigator Design Suite Software Video- Jade Xilinx Kintex UltraScale FPGA Family Brochure- Complete radar and software radio interface solution- Supports Xilinx Kintex UltraScale FPGAs- Six 200 MHz 16-bit A/Ds- Six multiband DDCs (digital downconverters)- Two DUC (digital upconverter)- Four 800 MHz 16-bit D/As- 10 GB of DDR4 SDRAM- Sample clock synchronization to an external system reference- LVPECL clock/sync bus for multimodule synchronization- PCI Express (Gen. 1, 2 & 3) interface up to x8- Optional LVDS and gigabit serial connections to the FPGA for custom I/O- Compatible with several VITA standards including: VITA-46, VITA-48 and VITA-65 (OpenVPX™ System Specification)- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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4-Ch 500 MHz A/D with DDC & 4-Ch 800 MHz D/A with DUC, Kintex UltraScale - 6UVPX
Model 58851
- Jade Xilinx Kintex UltraScale FPGA Products and Navigator Design Suite Software Video- Jade Xilinx Kintex UltraScale FPGA Family Brochure- Complete radar and software radio interface solution- Supports Xilinx Kintex UltraScale FPGAs- Supports VITA-49.2 VITA Radio Transport standard- Four 500 MHz 12-bit A/Ds- Four multiband DDCs (digital downconverters)- Two DUC (digital upconverter)- Four 800 MHz 16-bit D/As- 10 GB of DDR4 SDRAM- Sample clock synchronization to an external system reference- LVPECL clock/sync bus for multimodule synchronization- PCI Express (Gen. 1, 2 & 3) interface up to x8- Optional LVDS and gigabit serial connections to the FPGA for custom I/O- Compatible with several VITA standards including: VITA-46, VITA-48 and VITA-65 (OpenVPX™ System Specification)- Optional 400 MHz 14-bit A/Ds- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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Digital Demultiplexers
Advanced Science and Novel Technology, Co., Inc.
24:48 digital demultiplexer (DMUX) with SSTL1.5 input and output interfaces.Supports data rates from 1.0Mbps to 2.0Gbps.User-controllable independent internal delays for data and clock signals.1.5V I2C control interface with a user-defined 3-bit chip address.Preset function for synchronization of multiple parallel devices.Full-rate output copy of external high-speed clock input signal.Two pairs of clock divided-by-2 and synchronous clock enable outputs for supporting the tree-type demultiplexation structure.Additional synchronous clock divided-by-4 output.Dual power supply of +3.0V and +1.5V.Industrial temperature range.Low power consumption of 2.1W at 2.0Gbps.Available in custom 256-pin BGA package (13mm x 13mm x 2.5mm).
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28/45 GHz Dual Optical Channel DCA-M with Option CDR
N1092B
High accuracy, low cost solution for optical waveform analysis including solutions for 8.4 through 64 GBaud, very low noise and jitter, fast sampling rates for high throughput, and integrated clock recovery available.
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AXIe 2-Slot Chassis
M9502A
The M9502A AXIe Chassis is fully compatible with the AXIe 1.0 specification. It includesan embedded system module (ESM)that does not take up an instrument slot. This system module performs the chassis management functions contained in the AXIe specification. Additionally, it provides PCI and LAN interfaces for connection to an external computer, external clock and trigger connectors, and Keysight-exclusive, inter-chassis synchronization connectors. The local bus implemented in the M9502A provides the maximum 62 pairs allowed by the AXIe specification. Combine the M9502A with the M9048A PCIe Desktop Adaptor to achieve the highest system bandwidth.
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Y/t Recorder Software Module
Metra Mess- und Frequenztechnik in Radebeul e.K.
*Time graph display*Level display of vibration acceleration*VM-PLOT+ also for velocity and displacement*RMS, positive, negative and unsigned peak values, slow changing instantaneous value*Two time axes for clock time and time since start*Up to four signals per window*One VM-Plot license can be operated simultaneously up to four times with different settings *External Messengers*Offline measurement
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*6U CompactPSB 4-slot SSR FSL 33MHz VIO 5V BW 64-Bit
80965-004-6800
6U CompactPSB Backplane 4-slot, PICMG 2.0 R3.0, system slot right, PICMG 2.16 R1.0 fabric slot left, supports full hot swap function according to PICMG 2.1 R2.0, 1Gb/s Ethernet switching, clock frequency 33MHz, V(I/O) +5V, bus width 64-bit
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2-Ch 500 MHz A/D with DDC & 2-Ch 800 MHz D/A with DUC, Kintex UltraScale - XMC
Model 71851
- Jade Xilinx Kintex UltraScale FPGA Products and Navigator Design Suite Software Video- Jade Xilinx Kintex UltraScale FPGA Family Brochure- Complete radar and software radio interface solution- Supports Xilinx Kintex Ultrascale FPGAs- Supports VITA-49.2 VITA Radio Transport standard- Two 500 MHz 12-bit A/Ds- Two multiband DDCs (digital downconverters)- One DUC (digital upconverter)- Two 800 MHz 16-bit D/As- 5 GB of DDR4 SDRAM- Sample clock synchronization to an external system reference- LVPECL clock/sync bus for multimodule synchronization- PCI Express (Gen. 1, 2 & 3) interface up to x8- VITA 42.0 XMC compatible with switched fabric interfaces- Optional LVDS and gigabit serial connections to the Kintex - Ultrascale FPGA for custom I/O- Optional 400 MHz 14-bit A/Ds- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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Multifrequency Clock Synthesizer - PMC
Model 7190
- Simultaneous synthesis of up to 5 different clocks- 8 SMC clock outputs- Ideal for A/D and D/A converter clock sources- Typical phase noise: -125 dBc/Hz @ 1 kHz offset- All clocks are phase-locked to input reference signal- Input reference frequency of 5 or 10 MHz- Four quad VCXOs allow selection from 16 different base frequencies- Output clocks of 1, 2, 4, 8, or 16 submultiples of VCXO base frequencies- Output clock frequencies between 50 and 500 MHz- Control and status via PCI bus interface
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Low Profile PCI Express 2-Port
7202ec
The 7202ec low-profile PCI Express serial interface provides two RS-232 serial ports. All modem control signals are implemented for maximum compatibility with a wide range of serial peripherals. Each serial port features an ultra high-speed UART, flexible clock prescalar, and large 256-byte Tx/Rx FIFOs allowing the adapter to support the widest range of standard and non-standard baud rates exceeding 1 Mbps. These features make the 7202ec ideal for data intensive applications that require reliable, ultra-fast throughput rates.
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Signal Acquisition
277
The Model 277 is designed around the Texas Instruments ADS42LB69 16-bit ADC. The 250 MHz sample clock is supplied by either the on-board frequency synthesizer or an external source. The frequency synthesizer can be phase locked to the local 10 MHz TCXO or an external reference can be used to achieve system-wide phase coherence.
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FPGA PXI High-Performance Digital I/O Card
GX3700
The GX3700 is a user configurable, FPGA-based, 3U PXI card which offers 160 digital I/O signals which can be configured for single-ended or differential interfaces. The card employs the Altera Stratix III FPGA, which can support SerDes data rates up to 1.2 Gb/s, digital I/O clock rates of 700 MHz, and features 47,500 logic elements and 2.1 kb of memory. The GX3700 is supplied with an integral expansion board providing access to the FPGA’s 160 I/Os. Alternatively, users can design their own custom expansion cards for specific applications - eliminating the need for additional external boards which are cumbersome and physically difficult to integrate into a test system. The design of the FPGA is done by using Altera’s free Quartus II Web Edition tool set. Once the user has compiled the FPGA design, the configuration file can be loaded into the FPGA directly or via an on-board EEPROM.
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USB System Timer
SKU-077-0X
The USB System Timer uses a standard USB interface to synchronize IP signals. This system timer provides accurate clock timing for Asterisk® open-source PBX software.
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USRP-2974, 10 MHz to 6 GHz, x86 Processor, GPS-Disciplined OCXO, USRP Software Defined Radio Stand-Alone Device
785606-01
The USRP-2974 is built on the LabVIEW reconfigurable I/O (RIO) architecture with an onboard Intel Core i7 processor running the NI Linux Real-Time OS. The USRP-2974 is a USRP Software Defined Radio Stand-Alone Device, meaning that you can target the onboard processor with LabVIEW Communications System Design Suite to deterministically perform processing. The USRP-2974 is also equipped with a GPS-disciplined 10 MHz oven-controlled crystal oscillator (OCXO) Reference Clock. You can prototype a range of advanced research applications that include stand-alone LTE or 802.11 device emulation; Medium Access Control (MAC) algorithm development; multiple input, multiple output (MIMO); heterogeneous networks; LTE relaying; RF compressive sampling; spectrum sensing; cognitive radio; beamforming; and direction finding. The registered trademark Linux® is used pursuant to a sublicense from LMI, the exclusive licensee of Linus Torvalds, owner of the mark on a worldwide basis.
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Single-ended, Direct Connect Probe, 34-Channel, 4 X 160-pin
U4206A
The U4206A is a direct-connect probe/cable with a standard soft touch pro connector at one end that routes to four 160-pin connectors that plug into the front panel connectors of a U4164A logic analyzer module. The U4206A is designed to be used with either the quad state mode or ¼ channel 10 GHz timing mode of the U4164A logic analyzer module. For use in quad state mode only, the U4206A includes two flying leads to connect additional clock qualifier signals into the clock inputs on Pods 3 and 7. Please refer to the U4164A installation guide for specific details on the operation of the U4164A quad sample state or ¼ channel 10 GHz timing modes of operation.
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10-CH General Purpose Timer/Counter & 8-CH DIO Module
cPCI-8554
- PICMG 2.0 Rev 3.0- Four 82C54 programmable timer/counter chips- Up to 12-CH 16-bit timer/counter- 1-CH 32-bit cascaded timer based on 8 MHz clock source- Four programmable clock sources for each timer/counter- Programmable de-bounce filters for external clock & external interrupt inputs- 8-CH TTL digital inputs & 8-CH TTL digital outputs- +12 V and +5 V power available on the connector
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High Accuracy Timing IP Core (HATI)
The HATI (High Accuracy Timing IP) is a FPGA core intended to enable sub-nanosecond synchronization accuracy once it is integrated onto a third-party hardware that it is connected to Safran’s WR-Z device by using optical fiber links. The IP core is able to achieve this performance thanks to the use of White Rabbit protocol (based on IEEE-1588, Sync-E and precise clock compensation).The only requirement is that the network device holds a FPGA directly connected to the port which will receive the synchronization from the network, since the HATI core needs to introduce and recover certain traffic flow which will be used in the synchronization process.
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L-Band RF Tuner and 2-Channel 200 MHz A/D with Virtex-6 FPGA - 3U VPX
Model 52690
- Accepts RF Signals from 925 to 2175 MHz- Programmable LNA boosts LNB (low noise block) antenna signal levels with up to 60 dB gain- Programmable analog downconverter provides I + Q baseband signals with bandwidths ranging from 4 to 40 MHz- Two 200 MHz 16-bit A/Ds- Supports Xilinx Virtex-6 LXT and SXT FPGA- 2 GB DDR3 SDRAM or 32 MB of QDRII+ SRAM- Sample clock synchronization to an external system reference- Clock/sync bus for multiboard synchronization- Optional LVDS connections to the Virtex-6 FPGA for custom I/O- 3U VPX form factor provides a compact, rugged platform- Compatible with several VITA standards including: VITA-46, VITA-48 and VITA-65 (OpenVPX™ System Specification)- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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PXIe-1095, 18-Slot, Up to 24 GB/s PXI Chassis
783882-01
PXIe, 18-Slot, Up to 24 GB/s PXI Chassis—The PXIe-1095 features a high-bandwidth backplane and 58 W of power and cooling in every slot to meet a wide range of high-performance test and measurement application needs. The chassis incorporates two hot-swappable power supplies to improve the mean time to repair (MTTR) of the PXI system; it also offers an optional timing and synchronization upgrade that includes a built-in oven-controlled crystal oscillator (OCXO) for increased clock accuracy and external clock and trigger routing. It accepts PXI Express modules in every slot and supports standard PXI hybrid-compatible modules in up to five slots.
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Digital Acquisition Card
PI-41000
The PI-41000-4G is a CompactPCI® bus based instrument card that allows the user to capture up to 32-bits of digital data into an on-board memory at clock rates up to 120 MHz. The inputs are software configurable to provide one 32-bit wide channel, one 16-bit wide channel with double depth or two 16-bit channels. When configured with a single 16-bit input, the card will capture at up to 120 MHz. When configured with two 16-bit inputs or as a single 32-bit input, the card will capture at up to 80 MHz. Each digital data channel requires three timing signals, frame, line and pixel to accommodate the data capture. When operating in a two channel mode, clocks from channel A can be used to provide timing to channel B. For wider words or multiple channels, more boards can be used in parallel.
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Phoenix LVDS Frame Grabber (PE4)
AS-PHX-D36-PE4
Phoenix-D36 is a PCI Express board for the acquisition of digital data from a variety of sources, including digital frame capture and line scan cameras. It has 36-bits used for input data, with 4-bits for control. This provides support for a single 12-bit RGB or 32-bit mono data source, including multi-tap cameras. The 4-bit control inputs are dedicated as Frame Enable, Line Enable, Data Enable and Pixel Clock.
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Miniature Dual-Stage Isolators
780nm And 852nm
AOSense offers dual-stage, free-space optical isolators at 780 nm and 852 nm for enhanced isolation. The innovative, small package size enables integration into compact laser sources and amplifiers without sacrificing transmission efficiency. The low external magnetic field enables the isolator to tightly integrate into systems with high magnetic-field sensitivity such as atomic spectrometers, magnetometers, clocks, and cold-atom devices.
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16 Bit DDS Generator Up To 200 MHz
96xx series
The 96xx series DDS generators deliver the highest performance in both speed and resolution. The series includes produts between one and 24 synchronous channels. DDS – Direct Digital Synthesis – is a method for generating sine waves from a single, fixed-frequency reference clock and is widely used in signal generation applications. The DDS functionality implemented on Spectrum Instrumentation’s AWG platform is based on the principle of adding multiple “DDS cores” to generate a mul?ti-carrier (multi-tone) signal, with each carrier having its own well-defined frequency, amplitude and phase. In addition to these static parameters, there are also build in dynamic parameters like frequency slope and amplitude slope to allow for intrinsic linear changes for multiple cores.
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8-Channel 200 MHz A/D with Multiband DDCs, Kintex UltraScale FPGA - 6U VPX
Model 58862
- Jade Xilinx Kintex UltraScale FPGA Products and Navigator Design Suite Software Video- Jade Xilinx Kintex UltraScale FPGA Family Brochure- Complete radar and software radio interface solution- Supports Xilinx Kintex UltraScale FPGAs- Eight 200 MHz 16-bit A/Ds- Eight multiband DDCs (digital downconverters)- 10 GB of DDR4 SDRAM- Sample clock synchronization to an external system reference- LVPECL clock/sync bus for multimodule synchronization- PCI Express (Gen. 1, 2, & 3) interface up to x8- Optional LVDS connections to the FPGA for custom I/O- Ruggedized and conduction-cooled version available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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CPCI timing plug-in
CPCI-SyncClock32
The CPCI-SyncClock32 from Brandywine Communications provides precision time with zero latency to the host computer over the CPCI bus in the 3u form factor. An on-board microprocessor automatically synchronizes the clock to reference signal inputs. The reference signal inputs can be 1 PPS, IRIG or NASA time codes and optionally, GPS or Have Quick.
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4-Channel 200 MHz A/D with 1532 DDCs, Kintex UltraScale FPGA - 6U VPX
Model 58865
- Jade Xilinx Kintex UltraScale FPGA Products and Navigator Design Suite Software Video- Jade Xilinx Kintex UltraScale FPGA Family Brochure- Complete software radio receiver solution for extremely high channel-count applications- Uses Xilinx Kintex UltraScale KU035 FPGAs- Four 200 MHz 16-bit A/Ds- Eight wideband DDCs (digital downconverters)- Up to 1524 narrowband DDCs- Sample clock generation and synchronization to an external system reference- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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Boundary-Scan Test / In-System Programming Controller
CPXI-1149.1/Turbo
The CPXI-1149.1/Turbo is a high-performance boundary-scan controller for multi-TAP (Test Access Port) and concurrent JTAG test and in-system programming. When combined with a ScanTAP™ intelligent pod, the CPXI-1149.1/Turbo offers up to 80 MHz clock rates on 4, 8, or 32 TAPs with features such as external write strobe, direct programming, and analog voltage measurement.
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12-Channel ADC Module
FMC112
Sundance Multiprocessor Technology Ltd.
The FMC112 is a twelve-channel ADC FMC Daughter Card which is fully compliant with the VITA 57.1-2008 standard. The FMC112 provides twelve A/D 14-bit 125Msps channels which can be sampled by an internal clock source (optionally locked to an external reference) or an externally supplied sample clock. A trigger input for customized sampling control is also available. The FMC112 has the LPC (Low-Pin Count) connector, front panel I/O, and is conduction cooled capable.
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Timing & Digital Logic ICs
Renesas offers a selection of industry standard quartz- and RC-based timing/oscillator ICs along with real time clocks. Timing circuits provide clock pulsing and synchronization in digital systems as well as pulse modulation circuits.
